Multiscale EM and Circuit Simulation Using the Laguerre-FDTD Scheme for Package-aware Integrated-circuit Design

Multiscale EM and Circuit Simulation Using the Laguerre-FDTD Scheme for Package-aware Integrated-circuit Design

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The objective of this research work is to develop an efficient methodology for chip-package cosimulation. In the traditional design flow, the integrated circuit (IC) is first designed followed by the package design. The disadvantage of the conventional sequential design flow is that if there are problems with signal and power integrity after the integration of the IC and the package, it is expensive and time consuming to go back and change the IC layout for a different input/output (IO) pad assignment. To overcome this limitation, a concurrent design flow, where both the IC and the package are designed together, has been recommended by researchers to obtain a fast design closure. The techniques from this research work will enable multiscale cosimulation of the chip and the package making the concurrent design flow paradigm possible.2.2.2 Companion Models The second step is to replace the FDTD grid, or the passive components in the case of circuit simulation, with their respective Laguerre companion models. SLeEC requires solving a system of linear equations of theanbsp;...


Title:Multiscale EM and Circuit Simulation Using the Laguerre-FDTD Scheme for Package-aware Integrated-circuit Design
Author: Krishna Srinivasan
Publisher:ProQuest - 2008
ISBN-13:

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